<?xml version="1.0" encoding="UTF-8"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-10-19T01:08:22Z</responseDate><request verb="GetRecord" identifier="oai:ebyu-rdlopen.rawdatalibrary.net:ebyu/13229" metadataPrefix="oai_dc">https://ebyu-rdlopen.rawdatalibrary.net/oai/request</request><GetRecord><record><header><identifier>oai:ebyu-rdlopen.rawdatalibrary.net:ebyu/13229</identifier><datestamp>2026-10-18T20:39:13Z</datestamp><setSpec>openaire</setSpec><setSpec>driver</setSpec><setSpec>com_ebyu_10000</setSpec><setSpec>col_ebyu_10001</setSpec></header><metadata><oai_dc:dc xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/oai_dc/ http://www.openarchives.org/OAI/2.0/oai_dc.xsd"><dc:title>Neuristor based electronically controllable logic gates</dc:title><dc:creator>Babacan, Yunus</dc:creator><dc:creator>Kacar, Firat</dc:creator><dc:subject>Electronically controllable logic gates</dc:subject><dc:subject>Logic gates</dc:subject><dc:subject>Memristor</dc:subject><dc:subject>Neuristor</dc:subject><dc:subject>Electric network topology</dc:subject><dc:subject>Topology</dc:subject><dc:subject>Neuron circuits</dc:subject><dc:subject>Voltage source</dc:subject><dc:subject>Computer circuits</dc:subject><dc:description>This paper presents electronically controllable neuron circuit-neuristor- based logic OR and AND gates using the same circuit topology. Here, only four neuristors are used to obtain both OR and AND gates which have three inputs and one output. The proposed circuit is electronically controllable and can be used as an OR or AND gate by changing only one voltage source without changing any circuit topology. All simulation results are obtained as expected from the electronically controllable logic gates based on the neuristor which composed of memristor. © 2021, The Author(s), under exclusive licence to Springer Science+Business Media, LLC part of Springer Nature.</dc:description><dc:publisher>Springer</dc:publisher><dc:date>2021</dc:date><dc:type>Article</dc:type><dc:identifier>https://rdlopen.rawdatalibrary.net/r/ebyu/13229</dc:identifier><dc:identifier>https://doi.org/10.1007/s10470-021-01796-0</dc:identifier><dc:identifier>0925-1030</dc:identifier><dc:language>en</dc:language><dc:relation>Analog Integrated Circuits and Signal Processing</dc:relation><dc:rights>info:eu-repo/semantics/openAccess</dc:rights><dc:type>info:eu-repo/semantics/article</dc:type><dc:identifier>https://ebyu-rdlopen.rawdatalibrary.net/tr/items/ebyu/13229</dc:identifier></oai_dc:dc></metadata></record></GetRecord></OAI-PMH>