<?xml version="1.0" encoding="UTF-8"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-10-19T01:36:07Z</responseDate><request verb="GetRecord" identifier="oai:ebyu-rdlopen.rawdatalibrary.net:ebyu/14109" metadataPrefix="oai_dc">https://ebyu-rdlopen.rawdatalibrary.net/oai/request</request><GetRecord><record><header><identifier>oai:ebyu-rdlopen.rawdatalibrary.net:ebyu/14109</identifier><datestamp>2026-10-18T20:33:58Z</datestamp><setSpec>openaire</setSpec><setSpec>driver</setSpec><setSpec>com_ebyu_10000</setSpec><setSpec>col_ebyu_10001</setSpec></header><metadata><oai_dc:dc xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/oai_dc/ http://www.openarchives.org/OAI/2.0/oai_dc.xsd"><dc:title>Ultra-Low voltage-power DTMOS based full-wave rectifier</dc:title><dc:creator>Babacan, Yunus</dc:creator><dc:subject>DTMOS</dc:subject><dc:subject>Full-wave rectifier</dc:subject><dc:subject>Ultra low-power</dc:subject><dc:subject>Ultra low-voltage</dc:subject><dc:subject>Passive networks</dc:subject><dc:subject>Rectifying circuits</dc:subject><dc:subject>Circuit components</dc:subject><dc:subject>Dynamic threshold mos (DTMOS)</dc:subject><dc:subject>Full-wave rectifiers</dc:subject><dc:subject>Post layout simulation</dc:subject><dc:subject>Ultra low power</dc:subject><dc:subject>Ultra-low power consumption</dc:subject><dc:subject>Ultra-low-voltage</dc:subject><dc:subject>Electric rectifiers</dc:subject><dc:description>In this paper, dynamic threshold MOS (DTMOS) transistor based full-wave rectifier with ultra-low power consumption is presented. The proposed circuit composed of only four NMOS and seven DTMOS transistors when many rectifier circuits consist of passive circuit components such as diodes, resistors and active circuit elements. The layout occupies an active area of 24.6 µm × 65.01 µm and post-layout simulation results performed using Cadence Environment with 0.18 µm TSMC CMOS technology parameters. The rectifier circuit with ±0.2 V DC supply voltages can be operated up to approximately 500 MHz and consumes only 2.83 nW thanks to the DTMOS transistors. © 2018</dc:description><dc:publisher>Elsevier GmbH</dc:publisher><dc:date>2018</dc:date><dc:type>Article</dc:type><dc:identifier>https://rdlopen.rawdatalibrary.net/r/ebyu/14109</dc:identifier><dc:identifier>https://doi.org/10.1016/j.aeue.2018.04.023</dc:identifier><dc:identifier>1434-8411</dc:identifier><dc:language>en</dc:language><dc:relation>AEU - International Journal of Electronics and Communications</dc:relation><dc:rights>info:eu-repo/semantics/openAccess</dc:rights><dc:type>info:eu-repo/semantics/article</dc:type><dc:identifier>https://ebyu-rdlopen.rawdatalibrary.net/tr/items/ebyu/14109</dc:identifier></oai_dc:dc></metadata></record></GetRecord></OAI-PMH>