Electronically tunable memristor based on VDCC

ArticleAçık Erişim

Özet

In this study, a simple memristor circuit using only one Voltage Differencing Current Conveyor (VDCC), two PMOS transistors and one grounded capacitor, is designed. The presented memristor exhibits electronically controllable characteristics, which are superior to its counterparts. Both the memductance value and the operating frequency can be electronically tuned through voltage sources. The proposed memristor, which occupies 42.2 µm × 27.5 µm area excluding the area of the capacitor, is laid by using Cadence Environment using TSMC 0.18 µm process parameters. In addition, the proposed memristor is implemented by using discrete circuit elements on the breadboard and detailed analyses are given by changing the values of the discrete circuit elements. All results are compatible with the previous studies. © 2019 Elsevier GmbH

Anahtar Kelimeler

RDL Kalıcı Bağlantı (PID)
https://rdlopen.rawdatalibrary.net/r/ebyu/13988Resmi atıflarda kullanılan kalıcı adres
DOI
https://doi.org/10.1016/j.aeue.2019.05.038Yayıncı resmi DOI adresi
Tam Kayıt
AlanDeğerDil
dc.contributor.authorYesil, Abdullah
dc.contributor.authorBabacan, Yunus
dc.contributor.authorKacar, Firat
dc.date.accessioned2026-10-18T20:28:47.168851605Z
dc.date.available2026-10-18T20:28:47.168851605Z
dc.date.issued2019
dc.description.abstractIn this study, a simple memristor circuit using only one Voltage Differencing Current Conveyor (VDCC), two PMOS transistors and one grounded capacitor, is designed. The presented memristor exhibits electronically controllable characteristics, which are superior to its counterparts. Both the memductance value and the operating frequency can be electronically tuned through voltage sources. The proposed memristor, which occupies 42.2 µm × 27.5 µm area excluding the area of the capacitor, is laid by using Cadence Environment using TSMC 0.18 µm process parameters. In addition, the proposed memristor is implemented by using discrete circuit elements on the breadboard and detailed analyses are given by changing the values of the discrete circuit elements. All results are compatible with the previous studies. © 2019 Elsevier GmbH
dc.identifier.doi10.1016/j.aeue.2019.05.038
dc.identifier.eissn1618-0399
dc.identifier.endpage290
dc.identifier.issn1434-8411
dc.identifier.scopus2-s2.0-85066798031
dc.identifier.startpage282
dc.identifier.urihttps://rdlopen.rawdatalibrary.net/r/ebyu/13988
dc.identifier.volume107
dc.identifier.wosWOS:000476566600032
dc.language.isoen
dc.publisherElsevier GmbH
dc.relation.ispartofAEU - International Journal of Electronics and Communications
dc.rightsinfo:eu-repo/semantics/openAccess
dc.subjectActive element
dc.subjectEmulator
dc.subjectExperimental results
dc.subjectLayout
dc.subjectMemristive circuit
dc.subjectMemristor
dc.subjectTunable
dc.subjectElectric grounding
dc.subjectMemristors
dc.subjectActive elements
dc.subjectElectric network analysis
dc.titleElectronically tunable memristor based on VDCC
dc.typeArticle
dspace.entity.typePublication
rdl.citation.scopus71
rdl.citation.wos62
rdl.source.indexSCOPUS
rdl.source.indexWOS
rdl.wos.indexScience Citation Index Expanded (SCI-EXPANDED)