Yılmaz, Demet; Güzeldir, Betül; Akkuş, Tuba; Öznülüer, Tuba

Thickness and composition of thin films can be measured with X- and gamma-rays. In this work, thickness and composition of vanadium pentoxide thin films are investigated by energy dispersive and wavelength dispersive X-ray fluorescence systems. Also, the surface analysis of vanadium pentoxide thin films irradiated with Rhodium Kα X-rays and 59.54 keV gamma-rays emitted from 100 mCi and 5 Ci Americium-241 radioactive sources is performed by scanning electron microscope. It is observed that X- and gamma-rays are destructive for vanadium pentoxide thin films. Also, the composition of vanadium pentoxide thin films changes by irradiation with X- and gamma-rays.

Yllmaz, Demet; Allm, Bünyamin; Akkuş, Tuba; Güzeldir, Betül

The energy absorption buildup factors (EABF) have been calculated for some thermoluminescent dosimetric materials (Al2O3 and SiO2) in the energy region 0.015-15MeV up to the penetration depth of 40 mean free paths (mfp). Also, kerma relative to air has been determined for these materials. It is observed that the energy absorption buildup factors and kerma relative to air depend on the photon energy and chemical content. Also, the energy absorption build up factors are found the highest in intermediate energy whereas the lowest in low- as well as high energies.

Özakin, Oǧuzhan; Güzeldir, Betül; Yildirim, M. Ali; Saǧlam, Mustafa; Ateş, Aytunş

ZnS thin films were deposited on glass substrates using SILAR method at room temperature and ambient pressure. The relationship between refractive index and energy bandgap was investigated. The film thickness effect on the structural, morphological and optical properties of ZnS thin films was investigated. The crystalline and surface properties of the films improved with increasing film thickness. The energy bandgap values changed from 3.87 to 3.58 eV with increasing film thickness. The refractive index (n), high frequency dielectric constant (ε ∞) values were calculated by using the energy bandgap values as a function of the film thickness. Also, ZnS thin film was deposited directly on n-GaAs substrate for obtaining the Zn/ZnS/n-GaAs/In sandwich structure at room temperature. The sandwich structure demonstrated clearly rectifying behaviour by the current-voltage (I-V) curves at room temperature. From I-V characteristics n and φ b values were calculated as 1.894 and 0.632 eV at room temperature, respectively.

Ali Yildirim, M.; Güzeldir, B.; Ate, A.; Salam, M.

This is the first time; it was employed Successive Ionic Layer Adsorption and Reaction (SILAR) method in order to prepare Zn/ZnO/n-Si/Au-Sb sandwich structure. The ZnO interface layer was directly formed on n-type Si substrate using SILAR method. The X-ray diffraction (XRD) and scanning electron microscopy (SEM) studies were showed that the film is covered well on n-type Si substrate and have polycrystalline structure. An Au-Sb electrode was used as an ohmic contact. The Zn/ZnO/n-Si/Au-Sb sandwich structure demonstrated clearly rectifying behavior by the current-voltage (I-V) curves studied at room temperature. The sample temperature effect on the current-voltage (I-V) characteristics of Zn/ZnO/n-Si/Au-Sb structure was investigated in temperature range 80-320 K by steps of 20 K. The parameters such as barrier height, ideality factor and series resistance of this structure were calculated from the forward bias I-V characteristics as a function of sample temperature. It was seen that the ideality factor and series resistance were decreased; the barrier height were increased with increasing temperature. The experimental values of barrier height and ideality factor for this device were calculated as 0.808 eV and 1.519 at 320 K; 0.220 eV and 4.961 at 80 K, respectively. These abnormal behaviors can be explained by the barrier inhomogeneities at the metal-semiconductor (M-S) interface.

Ateş, A.; Saǧlam, M.; Güzeldir, B.; Yildirim, M.A.; Astam, A.

Cu/CuS/p-Si/Al structure formed using CuS thin film on p-Si substrate. CuS thin film has been grown with using Successive Ionic Layer Adsorption and Reaction (SILAR) method. The Cu/CuS/p-Si/Al structure has demonstrated clearly rectifying behavior by the current-voltage (I-V) curves studied at room temperature. The characteristic parameters such as barrier height, ideality factor and series resistance of Cu/CuS/p-Si/Al structure have been calculated from the forward bias I-V and reverse bias C-2-V characteristics. The ideality factor and barrier height have been obtained as n=1.63 and Φb=0.69 eV by applying a thermo-ionic emission theory. At high current densities in the forward direction, the series resistance effect has been observed. The values of Rs obtained from dV/d(lnI) - I and H(I) - I plots are near to each others (Rs=340.33 □ and R s=346.24 □, respectively). In the same way, the barrier height calculated from C-2-V characteristics have been varied from 0.523 to 0.601 eV. Furthermore, the density distribution of interface states of the multilayer device has been obtained from the semi-log forward bias I-V characteristics. It has been seen that the Nss has almost an exponential rise with bias voltage from top of the valance band toward to mid gap.

Saǧlam, M.; Ateş, A.; Yildirim, M.A.; Güzeldir, B.; Astam, A.

In this study, this is the first time, it has been employed Successive Ionic Layer Adsorption and Reaction (SILAR) method in order to prepare Cd/CdO/n-Si/Au-Sb sandwich structure. The sample temperature effect on the current-voltage (I-V) characteristics of Cd/CdO/n-Si/Au-Sb structure has been investigated in a wide temperature range by steps of 20 K. The parameters such as barrier height, ideality factor and series resistance of this structure have been calculated from the forward bias I-V characteristics as a function of sample temperature. With a decreasing temperature, a decreasing in the apparent barrier height (Φb0), an increasing in the ideality factor (n) and a nonlinearity in the activation energy plot have been seen. The experimental values of barrier height and ideality factor for this device have been calculated as 0.871 eV and 1.787 at 300 K and 0.436 eV and 2.221 at 80 K, respectively. These abnormal behaviors can be explain by the barrier inhomogeneities at the metal-semiconductor (M-S) interface. From the temperature dependent I-V characteristics of the Cd/CdO/n-Si/Au-Sb sandwich structure, over(Φ, ̄)b 0 and A* are calculated as 0.790 and 1.160 eV, and 153.90 and 188.42 A/cm2 K2, respectively, by using ln (I0 / T2) - q2 σs2 / 2 k2 T2 vs. 1/T plot for the two temperature regions. Deviation of experimental values of A* from known value for n-Si has been attributed to the spatial inhomogeneous barrier heights and potential fluctuations at the interface that consist of low and high barrier areas.

Saǧlam, M.; Ateş, A.; Güzeldir, B.; Astam, A.; Yildirim, M.A.

In general, at the metal-semiconductor contacts, interfacial layers have been fabricated by different methods such as molecular beam epitaxy, metal organic chemical vapor deposition, sputtering and vacuum evaporation. However, all of these techniques have encountered various difficulties in the deposited films. Instead of these methods, since Successive Ionic Layer Adsorption and Reaction (SILAR) method is simple, fast, sensitive, and less costly to prepare interfacial layer, we have first employed this method in order to prepare Cd/CdS/n-Si/Au-Sb sandwich structure. For this reason, the CdS thin film has been directly formed on n-type Si substrate by means of SILAR method. The Cd/CdS/n-Si/Au-Sb sandwich structure has demonstrated clearly rectifying behaviour by the current-voltage (I-V) curves studied at room temperature. In order to observe the effect of the thermal annealing, this structure has been annealed at temperatures from 50 to 300 °C for 3 min in N2 atmosphere. The characteristic parameters such as barrier height, ideality factor and series resistance of this structure have been calculated from the forward bias I-V characteristics as a function of annealing temperature with different methods. The values of n, Φb and mean Rs of the initial Cd/CdS/n-Si/Au-Sb sandwich structure were found to be 2.31, 0.790 eV and 1.86 kΩ respectively. After annealing at 300 °C, these values were changed to 1.89, 0.765 eV and 0.48 kΩ. It has been seen that the barrier height, ideality factor and series resistance have slightly changed with increasing annealing temperature up to 300 °C.

Saǧlam, M.; Ateş, A.; Güzeldir, B.; Yildirim, M.A.; Astam, A.

The CdS thin film has been directly formed on n-type Si substrate to form an interfacial layer between cadmium (Cd) and n-type Si with Successive Ionic Layer Adsorption and Reaction (SILAR) method. An Au-Sb electrode has been used as an ohmic contact. The Cd/CdS/n-Si/Au-Sb structure has demonstrated clearly rectifying behaviour by the current-voltage (I-V) curves studied at room temperature. The characteristics parameters such as barrier height, ideality factor and series resistance of Cd/CdS/n-Si/Au-Sb structure have been calculated from the forward bias I-V and reverse bias C-2-V characteristics. The diode ideality factor and the barrier height have been calculated as n = 2.06 and Φb = 0.92 eV by applying a thermionic emission theory, respectively. The diode shows non-ideal I-V behaviour with an ideality factor greater than unity that can be ascribed to the interfacial layer, the interface states and the series resistance. At high current densities in the forward direction, the series resistance (Rs) effect has been observed. The values of Rs obtained from dV/d(lnI)-I and H(I)-I plots are near to each others (Rs = 182.24 Ω and Rs = 186.04 Ω, respectively). This case shows the consistency of the Cheung′s approach. In the same way, the barrier height calculated from C-2 -V characteristics varied from 0.698 to 0.743 eV. Furthermore, the density distribution of interface states (Nss) of the device has been obtained from the forward bias I-V characteristics. It has been seen that, the Nss has almost an exponential rise with bias from the mid gap toward the bottom of conduction band.